Abstract: To study the implementation of radar BIT and system level test, the method of boundary scan in chip level was extended to system level by means of BTU and TMU, whlch were deslgned by programmable logic devices. Application of the new method in radar digital signal processor was also given. Testing results in digital signal processor showed the feasibility of the method- With the ability of on line testing, off-line testing and system adjustment, the method is simple for designing and easy to implement because fewer hardwares are needed. In addition, faults can be located to board level and chip level at high fault-coverage-rate.