Abstract: Monopulse radar signal preprocess is very important in signal preprocess, but monopulse radar signal preprocess requires large amount of computation with fixed algorithm structure relatively. To solve the problem, a field programmable gate array (FPGA) was used to realize the preprocessing system. Firstly, sampling three channel IF signal, and the sampled data were respectively used for down conversion to obtain the baseband digital signal. Considering a variety of patterns of the signal, and a lot of resources in pulse compression, a pulse compression module was used to complete the processing of three signals of different modes. Then a test signal was generated with FPGA and input to the ADC to realize the loopback test. Finally, the processing result and simulation result were compared and analyzed. The consistent results show that the design of the system is reasonable and feasible.