Method Based on Time Randomization to Resist Fault Sensitivity Analysis

A fault sensitivity analysis (FSA)-resistance model based on time randomization is proposed. The randomization unit is composed of two parts, namely the configurable register array (R-A) and the decoder (chiefly random number generator, RNG). In this way, registers chosen can be either valid or invalid depending on the configuration information generated by the decoder. Thus, the fault sensitivity information can be confusing. Meanwhile, based on this model, a defensive scheme is designed to resist both fault sensitivity analysis (FSA) and differential power analysis (DPA). This scheme is verified with our experiments.